Non-volatile memory systems include a non-volatile memory controller and the non-volatile memory storage media. A host computer system issues and places one or more non-volatile memory commands in memory command queues. The memory command queues are allocated portions of the host computer system's memory. The host computer notifies a non-volatile memory controller that the non-volatile memory commands are available to be fetched in the memory command queues.
The non-volatile memory controller fetches the commands in an order defined by a non-volatile memory protocol. The non-volatile memory controller fetches the new memory command from the memory command queues and starts to perform a flow of operations for servicing the fetched memory command. Each operation involving different processes of firmware code (CPU) and/or hardware modules. Examples for such processes include, but not limited to: preparing memory buffers, memory address mapping scheme for translating LBA address to physical memory block address, decoding schemes for decoding data, arbitration logic for fetching data from the non-volatile memory storage and sending a completion indication back to the host computer system and others.
The non-volatile memory controller requires all the information needed to perform each memory command and the command must be fully fetched. Unfortunately, the memory command fetching encumbers the end protocol of the host computer system, such as PCIe, and can significantly slow the throughput of data to and from the non-volatile memory system.